Hi,
currently it seems like we do not have any 'main' msp430 developers,
though there are some who have spend some time on these boards. I have
just last week implemented our low-level peripheral interfaces for UART,
timers, SPI, and GPIO for the msp430 - stumbling on exactly the painful
inconsistencies in the msp430 family you describe below...
To cope with some of them, I actually re-wrote parts of the msp430
header files in a more modern, ARM CMSIS style. This makes it much
easier, to implement register based code in a configurable fashion.
Although we do now have first periph driver implementation, there is a
lot of cleanup of the msp code to be done. Some steps include (i) moving
and generalization of the clock initialization code from the boards into
the cpu (as done for cortex based CPUs), (ii) implementation of missing
periph drivers (e.g. I2C, cpuid, adc, pwm), and switching to the CORE_NG
interface (implementing the interfaces in `core/include/arch/..`).
So your help would be much appreciated!
Cheers,
Hauke
On 07.09.2015 02:46, Eric Decker wrote:as430 chips on TinyOS. It was a
pain. The TI architecture across different models of the cpu is let us
just say not very consistent.
I've looked quickly at the approach taken in the RIOT code and there
are some issues which run into the TI issues.
I'd liked to possibly help you folks to avoid the same crap I ran into.
who are the main msp430 developers?
also take a look at my documentation (I actually documented the issues
as I ran into them) at
https://github.com/tp-freeforall/prod/blob/tp-master/tos/chips/msp430/00_Chip_Notes
--
Eric B. Decker
Senior (over 50 :-) Researcher
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