Marco,
This looks fine and I will apply it but I want to put it on 4.11
and master. Can you file a quick ticket on it?
Thanks.
--joel
On 9/10/2015 10:20 AM, Marcos Diaz wrote:
flush_data_cache uses R0 directly but doesn't list it as a clobbered register.
Compiling with -O3 made this code break, since the function that calls
flush_data_cache
already uses r0.
---
c/src/lib/libbsp/arm/beagle/include/bsp.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h
b/c/src/lib/libbsp/arm/beagle/include/bsp.h
index 0250749..d9fd2ae 100644
--- a/c/src/lib/libbsp/arm/beagle/include/bsp.h
+++ b/c/src/lib/libbsp/arm/beagle/include/bsp.h
@@ -112,7 +112,13 @@ static inline void isb(void)
/* flush data cache */
static inline void flush_data_cache(void)
{
- asm volatile("mov r0, #0; mcr p15, #0, r0, c7, c10, #4" : : : "memory");
+ asm volatile(
+ "mov r0, #0\n"
+ "mcr p15, #0, r0, c7, c10, #4\n"
+ : /* No outputs */
+ : /* No inputs */
+ : "r0","memory"
+ );
}
#define __arch_getb(a) (*(volatile unsigned char *)(a))
--
Joel Sherrill, Ph.D. Director of Research & Development
joel.sherr...@oarcorp.com On-Line Applications Research
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