On Mon, Mar 12, 2018 at 3:01 AM, Sebastian Huber
> On 10/03/18 18:02, Amaan Cheval wrote:
>> - Improve RTEMS SMP
>> What kinds of improvements to SMP are we considering?
> The SMP support is quite complete now. In general, an independent review is
> required, but this is probably not a GSoC project. Some areas in the
> implementation are a bit too complex (e.g. thread lock) and should be
> simplified, however, I guess this is a very difficult task.
> A formal specification using TLA+ for the OMIP and MrsP locking protocols
> would be nice.
> A proper strong APA scheduler:
> I am not sure if there is a real application demand for this.
I would be supportive of formal specification or strong APA projects
despite user demand.
>> As noted earlier, SMP
>> support on i386 is lagging. Is there any interest in bringing that up to
>> par with the other architectures?
> I think this makes only sense for a x86_64 BSP.
There is a need for a modernized framework for x86 and x86_64. Both
projects are relevant and important. I tend to agree that the SMP
support for 32-bit x86 is a low priority.
> From an application developer point of view a ready to use tracing of thread
> context switches and interrupts would be nice. Some kind of data provider
> for the lttng-relayd (LTTng 2 relay daemon)
> Which can be used by
Joel has been looking at the trace compass. We also have other tracing
projects (barectf integration) that would be relevant to investigate
along those same lines.
> Sebastian Huber, embedded brains GmbH
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
> Phone : +49 89 189 47 41-16
> Fax : +49 89 189 47 41-09
> E-Mail : sebastian.hu...@embedded-brains.de
> PGP : Public key available on request.
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
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