On 2/1/19 11:17 AM, Jiri Gaisler wrote: > On 2/1/19 9:34 AM, Sebastian Huber wrote: >> Hello, >> >> you need the tools from the latest RSB. >> >> However, the SIS crashed using an ERC32 test program: > > Yes, seems like I broke erc32 emulation. Leon2/3 still works fine - I will > investigate...
The erc32 memory controller was not properly initialized after I increased the amount of RAM in the simulator. The following patch should fix it. I will submit a proper patch for this, and also some other fixes to the RISC-V emulation. diff --git a/sim/sis/erc32.c b/sim/sis/erc32.c index be761379fb..ceedec52ed 100644 --- a/sim/sis/erc32.c +++ b/sim/sis/erc32.c @@ -362,8 +362,8 @@ decode_memcfg() if (rom8) mec_memcfg &= ~0x20000; else mec_memcfg |= 0x20000; - mem_ramsz = (256 * 1024) << ((mec_memcfg >> 10) & 7); - mem_romsz = (128 * 1024) << ((mec_memcfg >> 18) & 7); + mem_ramsz = (1024 * 1024) << ((mec_memcfg >> 10) & 7); + mem_romsz = (2 *1024 * 1024) << ((mec_memcfg >> 18) & 7); mem_ramstart = RAM_START; mem_ramend = RAM_END; _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel