Hi, I had some time for more hardware testing of the SMP functionality on a PC. It turns out I missed a few places where the APICID <-> cpuid needed to be translated. This only occurs if the APIC Ids of different cores are not numbered consecutively, which qemu does.
With this patch I can now run 52 examples on an Intel Atom with 4 cores. The patch should apply to master and the 5 branch. Did I understand it correctly, that for integrating the patch in the RTEMS5 release, I need to first create a ticketr? Best regards, Jan Jan Sommer (1): bsps/pc386: Fix IPI for non-consecutive APICIDs bsps/i386/pc386/start/smp-imps.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) -- 2.17.1 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel