On 7/19/2022 16:22, Chris Johns wrote:
On 20/7/2022 5:42 am, Kinsey Moore wrote:
---
user/bsps/aarch64/xilinx-zynqmp.rst | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst
b/user/bsps/aarch64/xilinx-zynqmp.rst
index 78bff12..58954d6 100644
--- a/user/bsps/aarch64/xilinx-zynqmp.rst
+++ b/user/bsps/aarch64/xilinx-zynqmp.rst
@@ -244,6 +244,15 @@ Cadence GEM instances present on all ZynqMP hardware
variants. All interfaces
are enabled by default, but only interfaces with operational MII busses will
be
recognized and usable in RTEMS. Most ZynqMP dev boards use CGEM3.
+When used with lwIP from the rtems-lwip integration repository, these BSP
+variants support networking via the 0th and any one other of the Cadence GEM
+instances simultaneously.
Is there a simpler way to word this? English may not be a user's first language.
When used with lwIP from the rtems-lwip integration repository, these BSP
variants support networking using the Cadence GEM interfaces labelled
``CGEM0`` to ``CGEM3``. Multiple interfaces can be used at the same time.
?
Chris
Unfortunately, it's not quite that simple, but I'll reword it in more
direct terms.
Thanks,
Kinsey
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