Looks ok. Push it.
On Mon, Aug 22, 2022 at 1:54 AM <chr...@rtems.org> wrote:
From: Chris Johns <chr...@rtems.org>
- Versal has IO mapped to the upper 64bit address space and
needs full 64bit addresses.
- Add xilinx_versal_aiedge for custom hardware
- Make the hardware settings the defaults and qemu as variants
Closes #4693
---
spec/build/bsps/aarch64/xilinx-versal/abi.yml | 10 +--
.../{bspqemuilp32.yml => bspaiedge.yml} | 8 +-
.../{bspqemulp64.yml => bspqemu.yml} | 4 +-
.../{bspvck190lp64.yml => bspvck190.yml} | 2 +-
.../{bspvck190ilp32.yml => grp_aiedge.yml} | 16 ++--
.../aarch64/xilinx-versal/linkcmds_ilp32.yml | 74
-------------------
.../bsps/aarch64/xilinx-versal/optclkuart.yml | 9 +--
.../bsps/aarch64/xilinx-versal/optloadoff.yml | 7 +-
.../bsps/aarch64/xilinx-versal/optramori.yml | 7 +-
.../bsps/aarch64/xilinx-versal/tstaiedge.yml | 15 ++++
10 files changed, 42 insertions(+), 110 deletions(-)
rename spec/build/bsps/aarch64/xilinx-versal/{bspqemuilp32.yml =>
bspaiedge.yml} (67%)
rename spec/build/bsps/aarch64/xilinx-versal/{bspqemulp64.yml =>
bspqemu.yml} (82%)
rename spec/build/bsps/aarch64/xilinx-versal/{bspvck190lp64.yml
=> bspvck190.yml} (91%)
rename spec/build/bsps/aarch64/xilinx-versal/{bspvck190ilp32.yml
=> grp_aiedge.yml} (51%)
delete mode 100644
spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
create mode 100644
spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
diff --git a/spec/build/bsps/aarch64/xilinx-versal/abi.yml
b/spec/build/bsps/aarch64/xilinx-versal/abi.yml
index 90bfca9f76..b52df18fb3 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/abi.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/abi.yml
@@ -5,16 +5,10 @@ actions:
- env-append: null
build-type: option
copyrights:
-- Copyright (C) 2021 Gedare Bloom
+- Copyright (C) 2021 Gedare Bloom
default:
- -mcpu=cortex-a72
-default-by-variant:
-- value:
- - -mcpu=cortex-a72
- - -mabi=ilp32
- variants:
- - aarch64/xilinx_versal_ilp32_qemu
- - aarch64/xilinx_versal_ilp32_vck190
+default-by-variant: []
description: |
ABI flags
enabled-by: true
diff --git
a/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml
b/spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml
similarity index 67%
rename from spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml
rename to spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml
index cdad919b1c..f8c9011143 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/bspqemuilp32.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspaiedge.yml
@@ -1,10 +1,10 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: aarch64
-bsp: xilinx_versal_ilp32_qemu
+bsp: xilinx_versal_aiedge
build-type: bsp
cflags: []
copyrights:
-- Copyright (C) 2021 Gedare Bloom
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software>
cppflags: []
enabled-by: true
family: xilinx-versal
@@ -12,8 +12,8 @@ includes: []
install: []
links:
- role: build-dependency
- uid: grp_qemu
+ uid: grp_aiedge
- role: build-dependency
- uid: linkcmds_ilp32
+ uid: linkcmds_lp64
source: []
type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml
b/spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml
similarity index 82%
rename from spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml
rename to spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml
index bd8dab6a6e..f7f167dbfb 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/bspqemulp64.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspqemu.yml
@@ -1,10 +1,10 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: aarch64
-bsp: xilinx_versal_lp64_qemu
+bsp: xilinx_versal_qemu
build-type: bsp
cflags: []
copyrights:
-- Copyright (C) 2021 Gedare Bloom
+- Copyright (C) 2021 Gedare Bloom
cppflags: []
enabled-by: true
family: xilinx-versal
diff --git
a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
similarity index 91%
rename from spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
rename to spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
index b33a10f8f0..bc2bbc1c5d 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
@@ -1,6 +1,6 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: aarch64
-bsp: xilinx_versal_lp64_vck190
+bsp: xilinx_versal_vck190
build-type: bsp
cflags: []
copyrights:
diff --git
a/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml
b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
similarity index 51%
rename from spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml
rename to spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
index 741b28c6e8..680584f36c 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/bspvck190ilp32.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/grp_aiedge.yml
@@ -1,19 +1,19 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-arch: aarch64
-bsp: xilinx_versal_ilp32_vck190
-build-type: bsp
+build-type: group
cflags: []
copyrights:
-- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
+- Copyright (C) 2022 Chris Johns <chris@contemporary.software>
cppflags: []
+cxxflags: []
enabled-by: true
-family: xilinx-versal
includes: []
install: []
+ldflags: []
links:
- role: build-dependency
- uid: grp_vck190
+ uid: grp
- role: build-dependency
- uid: linkcmds_ilp32
-source: []
+ uid: tstaiedge
type: build
+use-after: []
+use-before: []
diff --git
a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
b/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
deleted file mode 100644
index 2d7a922495..0000000000
--- a/spec/build/bsps/aarch64/xilinx-versal/linkcmds_ilp32.yml
+++ /dev/null
@@ -1,74 +0,0 @@
-SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
-build-type: config-file
-content: |
- /* SPDX-License-Identifier: BSD-2-Clause */
-
- /*
- * Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
- *
- * Redistribution and use in source and binary forms, with or
without
- * modification, are permitted provided that the following
conditions
- * are met:
- * 1. Redistributions of source code must retain the above
copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
copyright
- * notice, this list of conditions and the following
disclaimer in the
- * documentation and/or other materials provided with the
distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
- MEMORY {
- RAM : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} +
${BSP_XILINX_VERSAL_LOAD_OFFSET}, LENGTH =
${BSP_XILINX_VERSAL_RAM_LENGTH} - ${BSP_XILINX_VERSAL_LOAD_OFFSET}
- ${BSP_XILINX_VERSAL_NOCACHE_LENGTH} - (0x1000 *
${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
- NOCACHE : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} +
${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x1000 *
${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) -
${BSP_XILINX_VERSAL_NOCACHE_LENGTH}, LENGTH =
${BSP_XILINX_VERSAL_NOCACHE_LENGTH}
- RAM_MMU : ORIGIN = ${BSP_XILINX_VERSAL_RAM_BASE} +
${BSP_XILINX_VERSAL_RAM_LENGTH} - (0x1000 *
${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x1000 *
${AARCH64_MMU_TRANSLATION_TABLE_PAGES}
- }
-
- REGION_ALIAS ("REGION_START", RAM);
- REGION_ALIAS ("REGION_VECTOR", RAM);
- REGION_ALIAS ("REGION_TEXT", RAM);
- REGION_ALIAS ("REGION_TEXT_LOAD", RAM);
- REGION_ALIAS ("REGION_RODATA", RAM);
- REGION_ALIAS ("REGION_RODATA_LOAD", RAM);
- REGION_ALIAS ("REGION_DATA", RAM);
- REGION_ALIAS ("REGION_DATA_LOAD", RAM);
- REGION_ALIAS ("REGION_FAST_TEXT", RAM);
- REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM);
- REGION_ALIAS ("REGION_FAST_DATA", RAM);
- REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM);
- REGION_ALIAS ("REGION_BSS", RAM);
- REGION_ALIAS ("REGION_WORK", RAM);
- REGION_ALIAS ("REGION_STACK", RAM);
- REGION_ALIAS ("REGION_NOCACHE", NOCACHE);
- REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE);
-
- bsp_stack_exception_size = DEFINED (bsp_stack_exception_size) ?
bsp_stack_exception_size : 1024;
-
- bsp_section_rwbarrier_align = DEFINED
(bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M;
-
- bsp_vector_table_in_start_section = 1;
-
- bsp_translation_table_base = ORIGIN (RAM_MMU);
- bsp_translation_table_end = ORIGIN (RAM_MMU) + LENGTH (RAM_MMU);
-
- OUTPUT_FORMAT ("elf32-littleaarch64")
- OUTPUT_ARCH (aarch64:ilp32)
-
- INCLUDE linkcmds.base
-copyrights:
-- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
-enabled-by: true
-install-path: ${BSP_LIBDIR}
-links: []
-target: linkcmds
-type: build
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
index 4ba449b8fd..fb344019e2 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optclkuart.yml
@@ -4,13 +4,12 @@ actions:
- define: null
build-type: option
copyrights:
-- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
-default: 24000000
+- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
+default: 100000000
default-by-variant:
-- value: 100000000
+- value: 24000000
variants:
- - aarch64/xilinx_versal_ilp32.*
- - aarch64/xilinx_versal_lp64.*
+ - aarch64/xilinx_versal_qemu
description: |
Versal UART clock frequency in Hz
enabled-by: true
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
index 41023dcf3e..577a1451dd 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optloadoff.yml
@@ -7,12 +7,11 @@ actions:
build-type: option
copyrights:
- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
-default: 32768
+default: 0x0
default-by-variant:
-- value: 0x0
+- value: 32768
variants:
- - aarch64/xilinx_versal_lp64_vck190
- - aarch64/xilinx_versal_ilp32_vck190
+ - aarch64/xilinx_versal_qemu
description: |
offset of RAM region from memory area base
enabled-by: true
diff --git a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
index 8ab8f5bc13..6e94f55b7e 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/optramori.yml
@@ -7,12 +7,11 @@ actions:
build-type: option
copyrights:
- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
-default: 0x20000000
+default: 0x10000000
default-by-variant:
-- value: 0x10000000
+- value: 0x20000000
variants:
- - aarch64/xilinx_versal_lp64_vck190
- - aarch64/xilinx_versal_ilp32_vck190
+ - aarch64/xilinx_versal_qemu
description: |
base address of memory area available to the BSP
enabled-by: true
diff --git a/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
b/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
new file mode 100644
index 0000000000..cbc1c7e381
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-versal/tstaiedge.yml
@@ -0,0 +1,15 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-test-state:
+ # expected to produce a fatal-error when run
+ minimum: exclude
+
+build-type: option
+copyrights:
+- Copyright (C) 2021 Gedare Bloom <ged...@rtems.org>
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+type: build
--
2.19.1
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