By default, the Xilinx NAND driver does not probe the second chip
select. This alteration allows the second half of chips to be
detected when present.
---
bsps/include/dev/nand/xnandpsu.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/bsps/include/dev/nand/xnandpsu.h b/bsps/include/dev/nand/xnandpsu.h
index a93a74eb85..85343f4b96 100644
--- a/bsps/include/dev/nand/xnandpsu.h
+++ b/bsps/include/dev/nand/xnandpsu.h
@@ -181,7 +181,11 @@ extern "C" {
#define XNANDPSU_DEBUG
+#ifdef __rtems__
+#define XNANDPSU_MAX_TARGETS 2U /**< ce_n0, ce_n1 */
+#else
#define XNANDPSU_MAX_TARGETS 1U /**< ce_n0, ce_n1 */
+#endif
#define XNANDPSU_MAX_PKT_SIZE 0x7FFU /**< Max packet size */
#define XNANDPSU_MAX_PKT_COUNT 0xFFFU /**< Max packet count */
--
2.30.2
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