A "Synchronous Data abort" occurs when a virtual memory translation
fails on load/store operations.
A "Prefetch abort" occurs when a virtual memory translation fails when
loading instructions into the CPU pipeline.
An "Asynchronous Data abort" occurs when a physical memory translation
fails (ie, no RAM or peripheral is mapped to the physical address)

The address of the fault corresponds to a kernel device mapping. My
guess is that you are not mapping kernel devices correctly at boot time:
https://github.com/seL4/seL4/blob/master/include/plat/exynos5/plat/machine/devices.h#L15
https://github.com/seL4/seL4/blob/master/include/plat/exynos5/plat/machine/hardware.h#L26
https://github.com/seL4/seL4/blob/master/src/arch/arm/32/machine/hardware.c#L51


 - Alex

On Tue, 2017-01-24 at 17:17 +0100, Wladislav Wiebe wrote:
> could it be an TLB fault? For my understandig, based on
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/BABFFDFD.html
> it is the DFSR  = 0x7 -> b00111
> Translation fault, 2nd level.
> 
> 
> Thanks!
> - Wladislav Wiebe
> 
> 2017-01-24 15:42 GMT+01:00 Wladislav Wiebe <[email protected]>:
> > Hello,
> >
> > has somebody experience with running into arm_data_abort_exception
> > after enabling the MMU/paging and jumping to the kernel image:
> > ..
> > ELF-loader started on CPU: ARM Ltd. Cortex-A15 r2p4
> >   paddr=[90000000..904b041f]
> > ELF-loading image 'kernel'
> >   paddr=[80000000..80033fff]
> >   vaddr=[f0000000..f0033fff]
> >   virt_entry=f0000000
> > ELF-loading image 'sel4test-driver'
> >   paddr=[80034000..8042dfff]
> >   vaddr=[10000..409fff]
> >   virt_entry=1e924
> > Enabling MMU and paging
> > Jumping to kernel-image entry point...
> >
> > check_data_abort_exception()
> > DFAR  = 0xfff01014
> > DFSR  = 0x7
> > ADFSR = 0x0
> > abort() called.
> >
> > I've dumped the DFAR/DFSR register --
> >
> > Relevant config parts about the setup:
> > CONFIG_ARCH_ARM_V7A=y
> > CONFIG_ARCH_ARM=y
> > CONFIG_ARCH_AARCH32=y
> > CONFIG_ARM_CORTEX_A15=y
> > CONFIG_PLAT_KEYSTONE=y
> >
> >
> > Thanks in advance!
> > --
> > WBR, Wladislav WIebe
> 
> 
> 

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