Hi Jack, On 5 Nov 2021, at 22:53, Jack Chen via Devel <[email protected]> wrote: > > Is WCET still a research focus of the team? RISC-V aside, for Armv7 v8 (and > x64), measurement-based is probably the way forward IMHO. Wish there's more > publications on measurement-based WCET of seL4. If the team & the community > would like to share insights and discuss this matter, I'd be happy to stick > around and ask more questions.
As Matt said, the WCET toolchain is bitrotted. It was used for ARMv6 cores, but Arm stopped providing instruction latency information for their A cores, so WCET analysis on those is no longer possible, which basically means these Arm A cores are no longer usable for hard real-time. Measurement-based WCET analysis is unsound, of course, and not suitable for safety-critical use. RISC-V is different, in particular for the open-source implementations, some of which made it into silicon, with more to come. We’d love to revive the WCET analysis for RISC-V, basing it off the great work Matt & Co did on the translation validation toolchain, which is a core part of the high-assurance WCET evaluation process. It’ll require a fair amount of work and I’m waiting for someone to fund it. I’m sure it’ll happen eventually, given that seL4 still seems to be the only protected-mode RTOS that has undergone a sound WCET analysis on a pipelined processor. Gernot _______________________________________________ Devel mailing list -- [email protected] To unsubscribe send an email to [email protected]
