I'm trying to get s3 virge to work on PPC (PowerMac with PCI) - a
bigendian platfornm. Stock s3virge driver compiles fine and runs without
crashing but knows nothing about bigendian so the colors & images are
"mildly" distorted.
I asked xpert list for advice and got some. With that in mind I
developed a patch for bigendian support. It solves some of my problems
but not all.
Colors are OK now but the bitmaps are broken. When fonts are drawn in
xterm, every 8 pixels are horizontally reversed (in 16bpp mode). Mozilla
window contets are mostly OK but some garbage remains inside frames.
When moving xterm over mozilla, traces remain (probably the same bitmap
reversion problem).
The other problem is garbled lower half (or 1/3 or something inbetween
actually) of screen. It contains garbage, not the image. Things move
inside it when something is drawn on the screen or the cursor is moved
so it looks like a pixmap cache. I believe I run into the pixmap cache
with the framebuffer because I use the upper 32M of video address space
because of endianness. The display is fine in 8bpp mode, presumably
because 8 bpp uses less video memory. I want to get rid of this defect.
Should relocating the pixmap cache help? If yes, how to do it?
If somebody has some programming information about virge family and is
free from NDA-s, I would very much like to get a copy - the only source
I had right now is a letter form Ani Joshi and kgi source.
The current patch is below. It is somewhat tested with 16 bpp and 15
bpp. 8bpp works but the cursor leaves some traces. 24 bpp works like 16
bpp but X kills the display after X server shutdown so I have ro type
reboot blindly. Hardware cursor problem are secondary right now, bitmap
reversion and lower half of the screen are the current problems.
Tha megic constant 0x43 in CR54 is the value that OpenProm F-Code boot
rom puts there on boot (or maybe the macos driver). I don't know what
most of the bits mean there :(
is fbOffset the right field to use the 32M offset that bigendian mode
needs?
Index: s3v_driver.c
===================================================================
RCS file: /cvs/xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v
retrieving revision 1.84
diff -u -r1.84 s3v_driver.c
--- s3v_driver.c 2002/07/24 01:47:31 1.84
+++ s3v_driver.c 2003/01/19 16:45:11
@@ -2395,10 +2395,18 @@
"Internal error: could not map registers.\n");
return FALSE;
}
+
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ pScrn->fbOffset = 32*1024*1024; /* bigendian aperture is at 32M */
+#else
+ pScrn->fbOffset = 0;
+#endif
+ pScrn->memPhysBase = ps3v->PciInfo->memBase[0] + pScrn->fbOffset;
+
/* Map the framebuffer */
if (ps3v->videoRambytes) { /* not set in PreInit() */
ps3v->FBBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
- ps3v->PciTag, ps3v->PciInfo->memBase[0],
+ ps3v->PciTag, ps3v->PciInfo->memBase[0] +
+pScrn->fbOffset,
ps3v->videoRambytes );
if( !ps3v->FBBase ) {
@@ -2411,9 +2419,6 @@
ps3v->FBStart = ps3v->FBBase;
}
- pScrn->memPhysBase = ps3v->PciInfo->memBase[0];
- pScrn->fbOffset = 0;
-
/* Set up offset to hwcursor memory area */
/* It's a 1K chunk at the end of the frame buffer */
ps3v->FBCursorOffset = ps3v->videoRambytes - 1024;
@@ -2884,6 +2889,10 @@
new->CR31 = 0x8c; /* Dis. 64k window, en. ENH maps */
}
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ new->CR53 |= 0x2; /* 2 - word swap */
+#endif
+
/* Enables S3D graphic engine and PCI disconnects */
if(ps3v->Chipset == S3_ViRGE_VX){
new->CR66 = 0x90;
@@ -2958,7 +2967,12 @@
new->CR45 = 0x00;
/* Enable MMIO to RAMDAC registers */
new->CR65 = 0x00; /* CR65_2 must be zero, doc seems to be wrong */
+
+#if X_BYTE_ORDER==X_BIG_ENDIAN
+ new->CR54 = 0x43; /* 0x20 is OK */
+#else
new->CR54 = 0x00;
+#endif
if ( S3_ViRGE_GX2_SERIES(ps3v->Chipset) ||
/* S3_ViRGE_MX_SERIES(ps3v->Chipset) || CR40 reserved on MX */
--
Meelis Roos ([EMAIL PROTECTED])
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