I've started looking at the DT clock bindings in more depth. To what
level should the clock tree be defined in the DT? Should it be a
one-to-one correlation of current struct clk nodes to node in DT where
each node is a single input and output? Or only define a single (or few)
node with the inputs (oscillators) and many outputs for SOC's clock
controller (i.e. MX51 CCM).
If the DT itself does not have a hierarchical construction of nodes that
matches the clock tree hierarchy, then creating the hierarchy at
run-time will be a challenge and not be very efficient. It would require
1 pass for each clock node type to create all the nodes, and then
another pass to setup the hierarchy.
Rob
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