Hi Jamies,
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + clkgate: clkgate@800a0048 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x800a0048 4>;
> + compatible = "picochip,pc3x3-clk-gate";
> +
> + tzprot_clk: clock@0 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <0>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + spi_clk: clock@1 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <1>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + dmac0_clk: clock@2 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <2>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + dmac1_clk: clock@3 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <3>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + ebi_clk: clock@4 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <4>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + ipsec_clk: clock@5 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <5>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + l2_clk: clock@6 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <6>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + trng_clk: clock@7 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <7>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + fuse_clk: clock@8 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <8>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> +
> + otp_clk: clock@9 {
> + compatible = "picochip,pc3x3-gated-clk";
> + clock-outputs = "bus";
> + picochip,clk-disable-bit = <9>;
> + clock-frequency = <200000000>;
> + ref-clock = <&ref_clk>, "ref";
> + };
> + };
> +
did i miss anything? i didn't find who is the ref_clk. ref_clk should
be the source of the clock who reference it. For example:
/* external oscillator */
osc: oscillator {
compatible = "fixed-clock";
frequency = <32678>;
clock-outputs = "osc";
};
/* phase-locked-loop device, generates a higher frequency clock
* from the external oscillator reference */
pll: pll {
compatible = "some-pll-interface"
ref-clock = <&osc>, "osc";
reg = <0x4c000 0x1000>;
clock-outputs = "pll", "pll-switched";
};
osc is the source of pll. Then it is the ref-clock of pll.
Thanks
Barry
_______________________________________________
devicetree-discuss mailing list
[email protected]
https://lists.ozlabs.org/listinfo/devicetree-discuss
