W dniu 28 września 2011 18:51 użytkownik David Daney <[email protected]> napisał: > On 09/28/2011 12:25 AM, Michał Mirosław wrote: >> >> 2011/9/28 David Daney<[email protected]>: >> [...] >>> >>> +Example : >>> + >>> + /* The parent MDIO bus. */ >>> + smi1: mdio@1180000001900 { >>> + compatible = "cavium,octeon-3860-mdio"; >>> + #address-cells =<1>; >>> + #size-cells =<0>; >>> + reg =<0x11800 0x00001900 0x0 0x40>; >>> + }; >>> + >>> + /* >>> + An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a >>> + pair of GPIO lines. Child busses 2 and 3 populated with 4 >>> + PHYs each. >>> + */ >>> + mdio-mux { >>> + compatible = "cavium,mdio-mux-sn74cbtlv3253", >>> "cavium,mdio-mux"; >>> + gpios =<&gpio1 3 0>,<&gpio1 4 0>; >>> + mdio-parent-bus =<&smi1>; >>> + #address-cells =<1>; >>> + #size-cells =<0>; >> >> This should probably have 'compatible = "nxp,sn74cbtlv3253";' here. >> > > No, the sn74cbtlv3253 is a general purpose part that could be used to > multiplex anything (I2C, SPI, random analog signals, etc.). Only when it is > in the "cavium,mdio-mux-sn74cbtlv3253" configuration is it an MDIO bus > multiplexer.
This should use some generic name then. 'mdio-mux-gpio' or something. There's no point in introducing chip's model for a gate-like discrete device. Best Regards, Michał Mirosław _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
