On SH, as of 37b7a97884ba64bf7d403351ac2a9476ab4f1bba we have to use the endianess-agnostic I/O accessor functions.
In commit bf5f0019046d596d613caf74722ba4994e153899, Heiko fixed this for 32-bit PowerPC; my patch now generalizes upon that. The device is now recognized correctly for both litte-endian and big-endian sh7785lcr, but I have not tested this any further, as the board is situated in a remote data center. Signed-off-by: Thomas Schwinge <[email protected]> Cc: Paul Mundt <[email protected]> Cc: [email protected] Cc: Heiko Schocher <[email protected]> Cc: Samuel Ortiz <[email protected]> Cc: [email protected] Cc: [email protected] Cc: Ben Dooks <[email protected]> Cc: Vincent Sanders <[email protected]> Cc: Randy Dunlap <[email protected]> --- include/linux/sm501.h | 9 ++------- 1 files changed, 2 insertions(+), 7 deletions(-) diff --git a/include/linux/sm501.h b/include/linux/sm501.h index 02fde50..0312e3c 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -173,10 +173,5 @@ struct sm501_platdata { unsigned int gpio_i2c_nr; }; -#if defined(CONFIG_PPC32) -#define smc501_readl(addr) ioread32be((addr)) -#define smc501_writel(val, addr) iowrite32be((val), (addr)) -#else -#define smc501_readl(addr) readl(addr) -#define smc501_writel(val, addr) writel(val, addr) -#endif +#define smc501_readl(addr) __raw_readl(addr) +#define smc501_writel(val, addr) __raw_writel(val, addr) -- 1.7.4.1 _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
