On Thu, May 10, 2012 at 2:27 PM, John Crispin <[email protected]> wrote:
> Implement support for pinctrl on lantiq/xway socs. The IO core found on these > socs has the registers for pinctrl, pinconf and gpio mixed up in the same > register range. As the gpio_chip handling is only a few lines, the driver also > implements the gpio functionality. This obseletes the old gpio driver that was > located in the arch/ folder. > > Signed-off-by: John Crispin <[email protected]> > Cc: [email protected] > Cc: Linus Walleij <[email protected]> > Cc: Stephen Warren <[email protected]> > --- > This patch is part of a series moving the mips/lantiq target to OF and clkdev > support. The patch, once Acked, should go upstream via Ralf's MIPS tree. > > Changes in V2 > * cleanup select/depends of the relevant Kconfig symbols > * dont assume that the arry with out MFPs is linearly mapped > * sane return code checks inside ltq_pinctrl_dt_node_to_map > * remove 2 calls to pr_err and replace them with calls to dev_err > * propagate gpio_chips base addr to the gpio_range > * define the pin count inside the of_device_id.data > * minor changes to accomodate the pinctrl-falcon driver (more virt pointers > and clocks) > * change from core_initcall_sync to arch_initcall > * several typos, codestyle and whitespace cleanups > * use BIT(x) in favour of (1 << x) Acked-by: Linus Walleij <[email protected]> Yours, Linus Walleij _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
