On Mon, Dec 17, 2012 at 05:40:49PM +0530, Laxman Dewangan wrote: > Nvidia's Tegra has multiple uart controller which supports: > - APB dma based controller fifo read/write. > - End Of Data interrupt in incoming data to know whether end > of frame achieve or not. > - Hw controlled RTS and CTS flow control to reduce SW overhead. > > Add serial driver to use all above feature. > > Signed-off-by: Laxman Dewangan <[email protected]> > --- > .../bindings/serial/nvidia,serial-tegra.txt | 26 + > drivers/tty/serial/Kconfig | 14 + > drivers/tty/serial/Makefile | 1 + > drivers/tty/serial/serial_tegra.c | 1398 > ++++++++++++++++++++ > include/linux/serial_tegra.h | 33 +
This file should be in include/linux/platform_data/, right? thanks, greg k-h _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
