On Mon, Feb 04, 2013 at 03:23:49PM -0700, Stephen Warren wrote: > It seems extremely odd to me that the data delay would just happen to > end up meaning that inverting the clock works out to magically make > everything work.
> Still, if there really is a use-case for this in otherwise simple audio > systems, then I guess specifying all the DAI properties in sub-nodes is > indeed to simplest/most-flexible way to go. I've heard of this before when things get routed through an inverter for buffering (or sometimes a FPGA for something more fancy).
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