Hi Arun, On 03/08/2013 03:59 PM, Arun Kumar K wrote: > FIMC-IS firmware needs all the MIPI-CSIS interrupts to be enabled. > This patch enables all those MIPI interrupts. > > Signed-off-by: Arun Kumar K <[email protected]> > --- > drivers/media/platform/s5p-fimc/mipi-csis.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/media/platform/s5p-fimc/mipi-csis.c > b/drivers/media/platform/s5p-fimc/mipi-csis.c > index debda7c..11eef67 100644 > --- a/drivers/media/platform/s5p-fimc/mipi-csis.c > +++ b/drivers/media/platform/s5p-fimc/mipi-csis.c > @@ -64,7 +64,7 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)"); > > /* Interrupt mask */ > #define S5PCSIS_INTMSK 0x10 > -#define S5PCSIS_INTMSK_EN_ALL 0xf000103f > +#define S5PCSIS_INTMSK_EN_ALL 0xfc00103f
Do you know what interrupts are assigned to the CSIS_INTMSK bits 26, 27 ? In the documentation I have they are marked as reserved. I have tested this patch on Exynos4x12, it seems OK but you might want to merge it to the patch adding compatible property for exynos5. It would be good to know what these bits are for. And how enabling the interrupts actually help without modifying the interrupt handler ? Is it enough to just acknowledge those interrupts ? Or how it works ? -- Regards, Sylwester _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
