Signed-off-by: Maxime Ripard <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Russell King - ARM Linux <[email protected]>
Cc: Grant Likely <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Rob Landley <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Jason Gunthorpe <[email protected]>
Cc: Thomas Petazzoni <[email protected]>
Cc: Gregory Clement <[email protected]>
Cc: Ezequiel Garcia <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Jean-Francois Moine <[email protected]>
Cc: Gerlando Falauto <[email protected]>
Cc: Uwe Kleine-Koenig <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
 drivers/irqchip/irq-sun4i.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-sun4i.c b/drivers/irqchip/irq-sun4i.c
index 0191f2c..cab36b1 100644
--- a/drivers/irqchip/irq-sun4i.c
+++ b/drivers/irqchip/irq-sun4i.c
@@ -46,7 +46,8 @@ static int __init sun4i_init_domain_chips(void)
        struct irq_chip_generic *gc;
        int i, ret, base = 0;
 
-       ret = irq_alloc_domain_generic_chips(d, SUN4I_IRQS_PER_CHIP, 1,
+       ret = irq_alloc_domain_generic_chips(sun4i_irq_domain,
+                                            SUN4I_IRQS_PER_CHIP, 1,
                                             "sun4i_irq", handle_level_irq,
                                             clr, 0, IRQ_GC_INIT_MASK_CACHE);
        if (ret)
@@ -57,9 +58,9 @@ static int __init sun4i_init_domain_chips(void)
                gc->reg_base = sun4i_irq_base;
                gc->chip_types[0].regs.mask = SUN4I_IRQ_ENABLE_REG(i);
                gc->chip_types[0].regs.ack = SUN4I_IRQ_PENDING_REG(i);
-               gc->chip_types[0].chip.mask = irq_gc_mask_clr_bit;
-               gc->chip_types[0].chip.ack = irq_gc_ack_set_bit;
-               gc->chip_types[0].chip.unmask = irq_gc_mask_set_bit;
+               gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
+               gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
+               gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
 
                /* Disable, mask and clear all pending interrupts */
                writel(0, sun4i_irq_base + SUN4I_IRQ_ENABLE_REG(i));
-- 
1.8.1.2

_______________________________________________
devicetree-discuss mailing list
[email protected]
https://lists.ozlabs.org/listinfo/devicetree-discuss

Reply via email to