With recent support for true irqchip and clocksource drivers for Orion SoCs, now make use of it on DT enabled Dove boards.
Signed-off-by: Sebastian Hesselbarth <[email protected]> --- Cc: Grant Likely <[email protected]> Cc: Rob Herring <[email protected]> Cc: Rob Landley <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: John Stultz <[email protected]> Cc: Russell King <[email protected]> Cc: Jason Cooper <[email protected]> Cc: Andrew Lunn <[email protected]> Cc: Thomas Petazzoni <[email protected]> Cc: Gregory Clement <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] --- arch/arm/boot/dts/dove.dtsi | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 8612658..8d5be1e8 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -30,11 +30,28 @@ marvell,tauros2-cache-features = <0>; }; - intc: interrupt-controller { + timer: timer@20300 { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupt-parent = <&bridge_intc>; + interrupts = <1>, <2>; + clocks = <&core_clk 0>; + }; + + intc: main-interrupt-ctrl@20200 { compatible = "marvell,orion-intc"; interrupt-controller; #interrupt-cells = <1>; - reg = <0x20204 0x04>, <0x20214 0x04>; + reg = <0x20200 0x10>, <0x20210 0x10>; + }; + + bridge_intc: bridge-interrupt-ctrl@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20110 0x8>; + interrupts = <0>; + marvell,#interrupts = <5>; }; core_clk: core-clocks@d0214 { -- 1.7.2.5 _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
