Quoting Linus Walleij (2013-06-09 03:55:47)
> +static void pll_clk_disable(struct clk_hw *hw)
> +{
> + struct clk_pll *pll = to_pll(hw);
> + u32 val;
> +
> + return;
Is the early return intentional? Everything else looks good.
Acked-by: Mike Turquette <mturque...@linaro.org>
> +
> + spin_lock(&src_lock);
> + val = readl(src_base + SRC_PLLCR);
> + if (pll->id == 1) {
> + if (val & SRC_PLLCR_PLL1OVER) {
> + val &= ~SRC_PLLCR_PLL1EN;
> + writel(val, src_base + SRC_PLLCR);
> + }
> + } else if (pll->id == 2) {
> + val &= ~SRC_PLLCR_PLL2EN;
> + writel(val, src_base + SRC_PLLCR);
> + }
> + spin_unlock(&src_lock);
> +}
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