From: Dinh Nguyen <[email protected]>

The "altr,sysmgr-sdmmc-sdr" compatible property is used for the SOCFPGA
clk-sysmgr driver. This property represents the register inside the
system manager that controls the clock phase of the SD/MMC driver.

Signed-off-by: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
CC: Arnd Bergmann <[email protected]>
Cc: Mike Turquette <[email protected]>
CC: Olof Johansson <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Chris Ball <[email protected]>
Cc: Jaehoon Chung <[email protected]>
Cc: Seungwon Jeon <[email protected]>
Cc: [email protected]
Cc: [email protected]
CC: [email protected]
---
 .../bindings/arm/altera/socfpga-system.txt         |   10 ++++++++++
 arch/arm/boot/dts/socfpga.dtsi                     |   12 ++++++++++--
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt 
b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
index f4d04a0..7a6c7ed 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-system.txt
@@ -5,9 +5,19 @@ Required properties:
 - reg : Should contain 1 register ranges(address and length)
 - cpu1-start-addr : CPU1 start address in hex.
 
+Optional properties:
+- compatible = "altr,sysmgr-sdmmc-sdr". This compatible property is used
+to represent the clock phase settings for the SD/MMC IP.
+
 Example:
         sysmgr@ffd08000 {
                compatible = "altr,sys-mgr";
                reg = <0xffd08000 0x1000>;
                cpu1-start-addr = <0xffd080c4>;
+
+               sysmgr_sdr_mmc: sysmgr_sdr_mmc {
+                       #clock-cells = <0>;
+                       compatible = "altr,sysmgr-sdmmc-sdr";
+                       reg = <0x108 1>;
+               };
        };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index e273fa9..0662d04 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -521,8 +521,16 @@
                        };
 
                sysmgr@ffd08000 {
-                               compatible = "altr,sys-mgr";
-                               reg = <0xffd08000 0x4000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "altr,sys-mgr";
+                       reg = <0xffd08000 0x4000>;
+
+                       sysmgr_sdr_mmc: sysmgr_sdr_mmc {
+                               #clock-cells = <0>;
+                               compatible = "altr,sysmgr-sdmmc-sdr";
+                               reg = <0x108 1>;
                        };
+               };
        };
 };
-- 
1.7.9.5


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