On Oct 30, 2013, at 9:57 AM, Sricharan R wrote: > In some socs the gic can be preceded by a crossbar IP which > routes the peripheral interrupts to the gic inputs. The peripheral > interrupts are associated with a fixed crossbar input line and the > crossbar routes that to one of the free gic input line. > > The DT entries for peripherals provides the fixed crossbar input line > as its interrupt number and the mapping code should associate this with > a free gic input line. This patch adds the support inside the gic irqchip > to handle such routable irqs. The routable irqs are registered in a linear > domain. The registered routable domain's callback should be implemented > to get a free irq and to configure the IP to route it. > > Cc: Thomas Gleixner <[email protected]> > Cc: Linus Walleij <[email protected]> > Cc: Santosh Shilimkar <[email protected]> > Cc: Russell King <[email protected]> > Cc: Tony Lindgren <[email protected]> > Cc: Rajendra Nayak <[email protected]> > Cc: Marc Zyngier <[email protected]> > Cc: Grant Likely <[email protected]> > Cc: Rob Herring <[email protected]> > Signed-off-by: Sricharan R <[email protected]> > --- > [V2] Added default routable-irqs functions to avoid > unnessecary if checks as per Thomas Gleixner comments > and renamed routable-irq binding as per > Kumar Gala <[email protected]> comments. > > Documentation/devicetree/bindings/arm/gic.txt | 6 ++ > drivers/irqchip/irq-gic.c | 83 ++++++++++++++++++++++--- > include/linux/irqchip/arm-gic.h | 8 ++- > 3 files changed, 87 insertions(+), 10 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/gic.txt > b/Documentation/devicetree/bindings/arm/gic.txt > index 3dfb0c0..5357745 100644 > --- a/Documentation/devicetree/bindings/arm/gic.txt > +++ b/Documentation/devicetree/bindings/arm/gic.txt > @@ -49,6 +49,11 @@ Optional > regions, used when the GIC doesn't have banked registers. The offset is > cpu-offset * cpu-nr. > > +- arm,routable-irqs : Total number of gic irq inputs which are not directly > + connected from the peripherals, but are routed dynamically > + by a crossbar/multiplexer preceding the GIC. The GIC irq > + input line is assigned dynamically when the corresponding > + peripheral's crossbar line is mapped. > Example: > > intc: interrupt-controller@fff11000 { > @@ -56,6 +61,7 @@ Example: > #interrupt-cells = <3>; > #address-cells = <1>; > interrupt-controller; > + arm,routable-irqs = <160>; > reg = <0xfff11000 0x1000>, > <0xfff10100 0x100>; > };
DT Binding portion: Acked-by: Kumar Gala <[email protected]> - k -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
