Armada 370/XP SoCs have a 2 GHz fixed PLL that is used to feed other clocks. This commit adds a DT representation of this clock through a fixed-clock compatible node.
Reviewed-by: Gregory CLEMENT <[email protected]> Signed-off-by: Ezequiel Garcia <[email protected]> --- arch/arm/boot/dts/armada-370-xp.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 1de2dae..924c721 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -252,4 +252,13 @@ }; }; + + clocks { + /* 2 GHz fixed main PLL */ + mainpll: mainpll { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <2000000000>; + }; + }; }; -- 1.8.1.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
