Add SSI device tree data for OMAP3 and Nokia N900.

Signed-off-by: Sebastian Reichel <[email protected]>
---
 arch/arm/boot/dts/omap3-n900.dts | 28 ++++++++++++++++++++++++
 arch/arm/boot/dts/omap3.dtsi     | 47 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 75 insertions(+)

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 6fc85f9..52f5099 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -145,6 +145,19 @@
                        0x0d4 (PIN_OUTPUT | MUX_MODE4)          /* 
RX51_LCD_RESET_GPIO */
                >;
        };
+
+       ssi_pins: pinmux_ssi {
+               pinctrl-single,pins = <
+                       0x150 (PIN_INPUT_PULLUP | MUX_MODE1)    /* ssi1_rdy_tx 
*/
+                       0x14e (PIN_OUTPUT | MUX_MODE1)          /* ssi1_flag_tx 
*/
+                       0x152 (PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* 
ssi1_wake_tx (cawake) */
+                       0x14c (PIN_OUTPUT | MUX_MODE1)          /* ssi1_dat_tx 
*/
+                       0x154 (PIN_INPUT | MUX_MODE1)           /* ssi1_dat_rx 
*/
+                       0x156 (PIN_INPUT | MUX_MODE1)           /* ssi1_flag_rx 
*/
+                       0x158 (PIN_OUTPUT | MUX_MODE1)          /* ssi1_rdy_rx 
*/
+                       0x15a (PIN_OUTPUT | MUX_MODE1)          /* ssi1_wake */
+               >;
+       };
 };
 
 &i2c1 {
@@ -490,6 +503,21 @@
        power = <50>;
 };
 
+&ssi_port1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ssi_pins>;
+
+       ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
+
+       ssi-char {
+               compatible = "ssi-char";
+       };
+};
+
+&ssi_port2 {
+       status = "disabled";
+};
+
 &uart1 {
        status = "disabled";
 };
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index daabf99..b7e485c 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -630,5 +630,52 @@
                        num-eps = <16>;
                        ram-bits = <12>;
                };
+
+               ssi: ssi-controller@48058000 {
+                       compatible = "ti,omap3-ssi";
+                       ti,hwmods = "ssi";
+
+                       reg = <0x48058000 0x1000>,
+                             <0x48059000 0x1000>;
+                       reg-names = "sys",
+                                   "gdd";
+
+                       interrupts = <71>;
+                       interrupt-names = "gdd_mpu";
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       ssi_port1: ssi-port@0 {
+                               compatible = "ti,omap3-ssi-port";
+
+                               reg = <0x4805a000 0x800>,
+                                     <0x4805a800 0x800>;
+                               reg-names = "tx",
+                                           "rx";
+
+                               interrupt-parent = <&intc>;
+                               interrupts = <67>,
+                                            <68>;
+                               interrupt-names = "mpu_irq0",
+                                                 "mpu_irq1";
+                       };
+
+                       ssi_port2: ssi-port@1 {
+                               compatible = "ti,omap3-ssi-port";
+
+                               reg = <0x4805b000 0x800>,
+                                     <0x4805b800 0x800>;
+                               reg-names = "tx",
+                                           "rx";
+
+                               interrupt-parent = <&intc>;
+                               interrupts = <69>,
+                                            <70>;
+                               interrupt-names = "mpu_irq0",
+                                                 "mpu_irq1";
+                       };
+               };
        };
 };
-- 
1.8.5.1

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to [email protected]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Reply via email to