On Wed, Dec 18, 2013 at 10:55:37PM +0100, Sebastian Reichel wrote: > On Tue, Dec 17, 2013 at 07:29:34PM +0200, Tomi Valkeinen wrote: > > >> I added N900 display DT support on top of my v2 series, including > > >> pinmuxing. Can you check if it looks right and works? > > >> > > >> git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux.git work/dss-dt > > > > > > I just tried it and it does not work. On a first look the pinmuxing > > > looks fishy: 0x0d4 is muxed two times. > > > > Hmm, so it is. > > > > I'm not really familiar with SDI, I just muxed all the SDI pins, except > > datapair3. I previously thought that there's only the data and clock > > pairs for SDI, but the TRM revealed more sdi pins, so I included them. > > It is well possible that these can be removed: > > > > 0x0d0 (PIN_OUTPUT | MUX_MODE1) /* dss_data18.sdi_vsync */ > > 0x0d2 (PIN_OUTPUT | MUX_MODE1) /* dss_data19.sdi_hsync */ > > 0x0d4 (PIN_OUTPUT | MUX_MODE1) /* dss_data20.sdi_den */ > > 0x0d6 (PIN_OUTPUT | MUX_MODE1) /* dss_data21.sdi_stp */ > > Just removing the dss_data20.sdi_den pin was enough to get a working display. > I > don't know if the other pins are needed, because the display pins are already > muxed correctly by the bootloader.
I just had a look in the leaked n900 schematics. According to it the
following pins are connected to the display:
DSS_DATA20 (E28) GPIO 90 LCD_RST
DSS_DATA10 (AD28) SDI_DAT1N CDP 0
DSS_DATA11 (AD27) SDI_DAT1P CDP 1
DSS_DATA12 (AB28) SDI_DAT2N CDP 2
DSS_DATA13 (AB27) SDI_DAT2P CDP 3
DSS_DATA14 (AA28) SDI_DAT3N CDP 4
DSS_DATA15 (AA27) SDI_DAT3P CDP 5
DSS_DATA22 (AC27) SDI_CLKP CDP 6
DSS_DATA23 (AC28) SDI_CLKN CDP 7
I also noticed that dss_data19.sdi_hsync is used as gpio 89 for the
N900's proximity sensor. Thus I suggest the following SDI pin muxing:
dss_sdi_pins: pinmux_dss_sdi_pins {
pinctrl-single,pins = <
0x0c0 (PIN_OUTPUT | MUX_MODE1) /*
dss_data10.sdi_dat1n */
0x0c2 (PIN_OUTPUT | MUX_MODE1) /*
dss_data11.sdi_dat1p */
0x0c4 (PIN_OUTPUT | MUX_MODE1) /*
dss_data12.sdi_dat2n */
0x0c6 (PIN_OUTPUT | MUX_MODE1) /*
dss_data13.sdi_dat2p */
0x0c8 (PIN_OUTPUT | MUX_MODE1) /*
dss_data14.sdi_dat3n */
0x0ca (PIN_OUTPUT | MUX_MODE1) /*
dss_data15.sdi_dat3p */
0x0d8 (PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp
*/
0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn
*/
>;
};
-- Sebastian
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