Ping... Best Regards. Anson huang 黄勇才 Freescale Semiconductor Shanghai 上海浦东新区亮景路192号A座2楼 201203 Tel:021-28937058
>-----Original Message----- >From: Shawn Guo [mailto:[email protected]] >Sent: Wednesday, December 18, 2013 10:26 PM >To: Huang Yongcai-B20788 >Cc: [email protected]; [email protected]; [email protected]; >[email protected]; [email protected]; >[email protected] >Subject: Re: [PATCH V3 2/2] cpufreq: imx6q: correct VDDSOC/PU voltage scaling >when cpufreq is changed > >On Wed, Dec 18, 2013 at 04:26:50PM -0500, Anson Huang wrote: >> on i.MX6Q, cpu freq change need to follow below flows: >> >> 1. each setpoint has different VDDARM, VDDSOC/PU voltage, get the setpoint >> table from dts; >> 2. when cpu freq is scaling up, need to increase VDDSOC/PU voltage before >> VDDARM, if VDDPU is off, no need to change it; 3. when cpu freq is >> scaling down, need to decrease VDDARM voltage before >> VDDSOC/PU, if VDDPU is off, no need to change it; >> >> normally dts will pass vddsoc/pu freq/volt info to kernel, if not, >> will use fixed value for vddsoc/pu voltage setting. >> >> Signed-off-by: Anson Huang <[email protected]> > >Acked-by: Shawn Guo <[email protected]>
