Hi, On Sun, Feb 23, 2014 at 01:09:09PM +0100, Hans de Goede wrote: > The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed > through a single set of registers. Besides this there are also some other > phy related bits which need poking, which are per phy, but shared between the > ohci and ehci controllers, so these are also controlled from this new phy > driver. > > Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Maxime Ripard <[email protected]> Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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