This commit updates the devicetree binding documentation for this driver with the supported ECC strength and step size combinations.
Signed-off-by: Ezequiel Garcia <[email protected]> --- Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt index 86e0a56..650c0dc 100644 --- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt +++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt @@ -17,6 +17,14 @@ Optional properties: - num-cs: Number of chipselect lines to usw - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false + - nand-ecc-strength: number of bits to correct per ECC step + - nand-ecc-step-size: number of data bytes covered by a single ECC step + +The following ECC strength and step size are currently supported: + + - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (aka Hamming) + - nand-ecc-strength = <16>, nand-ecc-step-size = <2048> (aka BCH-4) + - nand-ecc-strength = <16>, nand-ecc-step-size = <1024> (aka BCH-8) Example: -- 1.9.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
