Add clocks for the SYS-DMAC0 and SYS-DMAC1 hardware blocks.
Signed-off-by: Ben Dooks <[email protected]>
---
arch/arm/boot/dts/r8a7790.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c39..f98b01d 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -671,16 +671,17 @@
compatible = "renesas,r8a7790-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
<&mp_clk>,
- <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>;
+ <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
<&hp_clk>, <&hp_clk>;
#clock-cells = <1>;
renesas,clock-indices = <
R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1
R8A7790_CLK_SCIFA0
R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0
R8A7790_CLK_SCIFB1
R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3
R8A7790_CLK_SCIFB2
+ R8A7790_CLK_SYS_DMAC0 R8A7790_CLK_SYS_DMAC1
>;
clock-output-names =
"scifa2", "scifa1", "scifa0", "msiof2",
"scifb0",
- "scifb1", "msiof1", "msiof3", "scifb2";
+ "scifb1", "msiof1", "msiof3", "scifb2",
"dmac0", "dmac1";
};
mstp3_clks: mstp3_clks@e615013c {
compatible = "renesas,r8a7790-mstp-clocks",
"renesas,cpg-mstp-clocks";
--
1.9.1
--
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