On Tuesday 15 April 2014 05:13 PM, Mohit Kumar wrote: > From: Pratyush Anand <[email protected]> > > SPEAr1310/40 uses miphy for PCIe, SATA. This patch adds documentation > for the binding on the top of generic phy bindings. > > Signed-off-by: Pratyush Anand <[email protected]> > Acked-by: Arnd Bergmann <[email protected]> > Cc: Mohit Kumar <[email protected]> > Cc: Viresh Kumar <[email protected]> > Cc: Kishon Vijay Abraham I <[email protected]> > Cc: [email protected] > Cc: [email protected]
Acked-by: Kishon Vijay Abraham I <[email protected]> > --- > .../devicetree/bindings/phy/st-spear1310-miphy.txt | 12 ++++++++++++ > .../devicetree/bindings/phy/st-spear1340-miphy.txt | 11 +++++++++++ > 2 files changed, 23 insertions(+), 0 deletions(-) > create mode 100644 > Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt > create mode 100644 > Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt > > diff --git a/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt > b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt > new file mode 100644 > index 0000000..b9b281a > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt > @@ -0,0 +1,12 @@ > +ST SPEAr1310-miphy DT detail > +=================================== > + > +SPEAr1310-miphy is a phy controller supporting PCIe and SATA. > + > +Required properties: > +- compatible : should be "st,spear1310-miphy" > +- reg : offset and length of the PHY register set. > +- misc: phandle for the syscon node to access misc registers > +- phy-id: Instance id of the phy. > +- #phy-cells : from the generic PHY bindings, must be 1. > + - cell[1]: 0 if phy used for SATA, 1 for PCIe. > diff --git a/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt > b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt > new file mode 100644 > index 0000000..7eb5335 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/st-spear1340-miphy.txt > @@ -0,0 +1,11 @@ > +ST SPEAr1340-miphy DT detail > +=================================== > + > +SPEAr1340-miphy is a phy controller supporting PCIe and SATA. > + > +Required properties: > +- compatible : should be "st,spear1340-miphy" > +- reg : offset and length of the PHY register set. > +- misc: phandle for the syscon node to access misc registers > +- #phy-cells : from the generic PHY bindings, must be 1. > + - cell[1]: 0 if phy used for SATA, 1 for PCIe. > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
