On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: > Enable the Annex F Time Sync explicitly for DRA7x and AM4372. > With this enabled the L2 PTP is working.
L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. > while at that rename TS_BIT8 to TS_TTL_NONZERO Is this bit finally documented for am335x? Thanks, Richard -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
