From: Rob Herring <[email protected]>

Set the PIC_ENABLES register when the passthru-mask property is present.
This enables interrupts on the secondary controller to be passed thru
directly to the primary controller.

Signed-off-by: Rob Herring <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Jason Cooper <[email protected]>
---
 drivers/irqchip/irq-versatile-fpga.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/irqchip/irq-versatile-fpga.c 
b/drivers/irqchip/irq-versatile-fpga.c
index 3ae2bb8..328440b 100644
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -26,6 +26,8 @@
 #define FIQ_ENABLE_SET         0x28
 #define FIQ_ENABLE_CLEAR       0x2C
 
+#define PIC_ENABLES             0x20   /* set interrupt pass through bits */
+
 /**
  * struct fpga_irq_data - irq data container for the FPGA IRQ controller
  * @base: memory offset in virtual memory
@@ -185,6 +187,7 @@ int __init fpga_irq_of_init(struct device_node *node,
        void __iomem *base;
        u32 clear_mask;
        u32 valid_mask;
+       u32 passthru_mask;
        int parent_irq;
 
        if (WARN_ON(!node))
@@ -209,6 +212,9 @@ int __init fpga_irq_of_init(struct device_node *node,
        writel(clear_mask, base + IRQ_ENABLE_CLEAR);
        writel(clear_mask, base + FIQ_ENABLE_CLEAR);
 
+       if (!of_property_read_u32(node, "passthru-mask", &passthru_mask))
+               writel(passthru_mask, base + PIC_ENABLES);
+
        return 0;
 }
 #endif
-- 
1.9.1

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