On Friday 10 October 2014 10:22:34 Y Vo wrote:
> APM: There are 6 GPIOs which can support IRQ, they are fixed to use
> external IRQ from XGIC. (The XGIC is based on the ARM Generic
> Interrupt Controller Architecture Specification, Architecture version
> 2.0, The XGIC provides the mechanism to collect interrupt requests
> (IRQs) from both on-chip as well as off-chip sources and deliver them
> to the multiple X-Gene1 cores within the X-Gene1 processor), So there
> are no way to read the GPIO DS when configure as an interrupt. They
> are specific GPIO for boot another boot chip in X-Gene which can
> access when boot up. So this is hardwire in the GPIO block.
> GPIO_DS8 ---> External IRQ0 (XGIC40)
> GPIO_DS9 ---> External IRQ1 (XGIC41)
> ...
> GPIO_DS13 ---> External IRQ5(XGIC45)
Could you read the status of the external IRQ line using irq_get_pending()
or another public interface?
If not, we may have to add an interface for doing this.
Arnd
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