On Mon, Dec 01, 2014 at 12:20:43AM +0000, Christophe Ricard wrote:
> st33zp24 tpm can be seen as a trivial i2c device as other i2c tpm.
> However several other properties needs to be documented such as lpcpd.
>
> Reviewed-by: Jason Gunthorpe <[email protected]>
> Signed-off-by: Christophe Ricard <[email protected]>
> ---
> .../devicetree/bindings/security/tpm/st33zp24.txt | 36
> ++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/security/tpm/st33zp24.txt
>
> diff --git a/Documentation/devicetree/bindings/security/tpm/st33zp24.txt
> b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt
> new file mode 100644
> index 0000000..eb48222
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/security/tpm/st33zp24.txt
> @@ -0,0 +1,36 @@
> +* STMicroelectronics SAS. ST33ZP24 TPM SoC
> +
> +Required properties:
> +- compatible: Should be "st,st33zp24_i2c".
s/_/-/ in property names and compatible strings, please.
> +- clock-frequency: I²C work frequency.
> +- reg: address on the bus
> +
> +Optional ST33ZP24 Properties:
> +- interrupt-parent: phandle for the interrupt gpio controller
> +- interrupts: GPIO interrupt to which the chip is connected
> +- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2
> state.
> +If set vps must present when the platform is going into sleep/hibernate mode.
What is 'vps'?
Mark.
> +
> +Optional SoC Specific Properties:
> +- pinctrl-names: Contains only one value - "default".
> +- pintctrl-0: Specifies the pin control groups used for this controller.
> +
> +Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2):
> +
> +&i2c2 {
> +
> + status = "okay";
> +
> + st33zp24: st33zp24@13 {
> +
> + compatible = "st,st33zp24_i2c";
> +
> + reg = <0x013>;
> + clock-frequency = <400000>;
> +
> + interrupt-parent = <&gpio5>;
> + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
> +
> + lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
> + };
> +};
> --
> 2.1.0
>
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