Hi, Philipp
The table you listed is VDDARM_IN and VDDSOC_IN which is for external
PMIC and we normally do NOT adjust them when cpufreq change, we only adjust the
internel LDO output, my table is for VDDARM_CAP and VDDSOC_CAP which are in the
comment column, for LDO output.
For LDO enabled mode, VDDARM/SOC_CAP is the output of LDO, we pass this table
to kernel opp.
For LDO bypassed mode, VDDARM/SOC_IN = VDDARM/SOC_CAP.
Best regards!
Anson Huang
-----Original Message-----
From: Philipp Zabel [mailto:[email protected]]
Sent: 2014-12-05 5:39 PM
To: Huang Yongcai-B20788
Cc: [email protected]; [email protected]; [email protected]
Subject: Re: [PATCH 2/2] arm: dts: imx6dl: correct cpufreq volt/freq table
Am Freitag, den 05.12.2014, 16:23 +0800 schrieb Anson Huang:
> Currently the cpufreq volt/freq table we used is for LDO enable mode,
> according to latest datasheet Rev. 3, 03/2014, the volt/freq table is
> as below:
>
> LDO enabled(min value):
> 996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
> 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
> 396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;
From which datasheet is this? I find it unlikely that the LDO enabled values
are not larger than the LDO bypassed ones. I just had a look at the
"i.MXSolo/6DualLite Automotive and Infotainment Applications Processors"
Datasheet (IMX6SDLAEC) Rev. 3, 03/2014 and the "i.MX 6Solo/6DualLite
Applications Processors for Consumer Products" Datasheet
(IMX6SDLCEC) Rev. 3, 03/2014, and they both have different values in Table 9
(Operating Ranges) for the LDO enabled case:
LDO enabled(min value):
996MHz: VDDARM: 1.350V, VDDSOC: 1.275V;
792MHz: VDDARM: 1.275V, VDDSOC: 1.275V;
396MHz: VDDARM: 1.175V, VDDSOC: 1.275V;
> LDO bypassed(min value):
> 996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
> 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
> 396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;
>
> Adding 25mV to cover board IR drop, for LDO enabled mode of 996MHz,
> VDDARM should be 1.250V, so this patch updates it.
>
> Signed-off-by: Anson Huang <[email protected]>
regards
Philipp
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