On 01/27/2015 02:03 AM, Pranavkumar Sawargaonkar wrote: > In APM X-Gene, GIC register space is 64K aligned while the sizes mentioned > in the dt are 4K aligned. This breaks KVM when kernel is built with 64K page > size due to size alignment checking in vgic driver for VCPU Control and > VCPU register. > > This patch corrects the sizes to be inline with the hardware spec. > > CC: [email protected] > CC: [email protected] > CC: [email protected] > CC: [email protected] > CC: [email protected] > CC: [email protected] > Signed-off-by: Pranavkumar Sawargaonkar <[email protected]> > Signed-off-by: Tushar Jagad <[email protected]> > Signed-off-by: Feng Kan <[email protected]> > --- > arch/arm64/boot/dts/apm/apm-storm.dtsi | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi > b/arch/arm64/boot/dts/apm/apm-storm.dtsi > index f1ad9c2..65f0e6d 100644 > --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi > +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi > @@ -81,10 +81,10 @@ > compatible = "arm,cortex-a15-gic"; > #interrupt-cells = <3>; > interrupt-controller; > - reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */ > - <0x0 0x78020000 0x0 0x1000>, /* GIC CPU */ > - <0x0 0x78040000 0x0 0x2000>, /* GIC VCPU Control */ > - <0x0 0x78060000 0x0 0x2000>; /* GIC VCPU */ > + reg = <0x0 0x78010000 0x0 0x10000>, /* GIC Dist */ > + <0x0 0x78020000 0x0 0x20000>, /* GIC CPU */ > + <0x0 0x78040000 0x0 0x10000>, /* GIC VCPU Control */ > + <0x0 0x78060000 0x0 0x20000>; /* GIC VCPU */ > interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */ > };
Thanks. I confirm that we have tested this. Jon. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
