Hi Chanwoo,
On Tuesday 03 February 2015 05:43 AM, Chanwoo Choi wrote:
This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.
Cc: Sylwester Nawrocki <[email protected]>
Cc: Tomasz Figa <[email protected]>
Signed-off-by: Chanwoo Choi <[email protected]>
Acked-by: Inki Dae <[email protected]>
---
.../devicetree/bindings/clock/exynos5433-clock.txt | 20 +++
drivers/clk/samsung/clk-exynos5433.c | 185 +++++++++++++++++++++
include/dt-bindings/clock/exynos5433.h | 41 ++++-
3 files changed, 245 insertions(+), 1 deletion(-)
Verified clock tree, clock register and bitfield settings against UM.
Changes looks OK to me.
Reviewed-by: Pankaj Dubey <[email protected]>
Thanks,
Pankaj Dubey
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