Define the SILK board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.

Based on the original patch by Vladimir Barinov
<[email protected]>.

Signed-off-by: Sergei Shtylyov <[email protected]>

---
This patch is against the 'renesas-devel-20150211-v3.19' tag of Simon Horman's
'renesas.git' repo.  It depends on just posted SILK board initial DT patch in
order to apply, on just posted R8A7794 PFC DT patch in order to compile, and
on R8A7794 PFC driver patch in order for  the pins  to be configured.

 arch/arm/boot/dts/r8a7794-silk.dts |   28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts
+++ renesas/arch/arm/boot/dts/r8a7794-silk.dts
@@ -22,7 +22,7 @@
        };
 
        chosen {
-               bootargs = "ignore_loglevel";
+               bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
                stdout-path = &scif2;
        };
 
@@ -41,6 +41,16 @@
                renesas,groups = "scif2_data";
                renesas,function = "scif2";
        };
+
+       ether_pins: ether {
+               renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
+               renesas,function = "eth";
+       };
+
+       phy1_pins: phy1 {
+               renesas,groups = "intc_irq8";
+               renesas,function = "intc";
+       };
 };
 
 &scif2 {
@@ -49,3 +59,19 @@
 
        status = "okay";
 };
+
+&ether {
+       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-names = "default";
+
+       phy-handle = <&phy1>;
+       renesas,ether-link-active-low;
+       status = "okay";
+
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+               interrupt-parent = <&irqc0>;
+               interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
+       };
+};

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