The A13 / A10s has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller.
Since most of the time these SRAM won't be accessible by the CPU, we can't use the mmio-sram driver and compatible. Signed-off-by: Hans de Goede <[email protected]> --- arch/arm/boot/dts/sun5i.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index c797d88..8c04f24 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -298,12 +298,46 @@ }; }; + /* + * Note we use the address where the mmio registers start, not where + * the SRAM blocks start, this cannot be changed because that would be + * a devicetree ABI change. + */ soc@01c00000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; + sram@00000000 { + compatible = "allwinner,sun4i-a10-sram"; + reg = <0x00000000 0x4000>; + allwinner,sram-name = "A1"; + }; + + sram@00004000 { + compatible = "allwinner,sun4i-a10-sram"; + reg = <0x00004000 0x4000>; + allwinner,sram-name = "A2"; + }; + + sram@00008000 { + compatible = "allwinner,sun4i-a10-sram"; + reg = <0x00008000 0x4000>; + allwinner,sram-name = "A3-A4"; + }; + + sram@00010000 { + compatible = "allwinner,sun4i-a10-sram"; + reg = <0x00010000 0x1000>; + allwinner,sram-name = "D"; + }; + + sram-controller@01c00000 { + compatible = "allwinner,sun4i-a10-sram-controller"; + reg = <0x01c00000 0x30>; + }; + dma: dma-controller@01c02000 { compatible = "allwinner,sun4i-a10-dma"; reg = <0x01c02000 0x1000>; -- 2.3.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
