2015-06-01 8:29 GMT+02:00 Eddie Huang <[email protected]>: > Add MT8173 I2C device nodes, include I2C controllers and pins. > MT8173 has six I2C controllers, from i2c0 to i2c6, exclude i2c5. > The 6th I2C controller register base doesn't next to 5th I2C, > and there is a hardware between 5th and 6th I2C controller. So > SoC designer name 6th controller as "i2c6", not "i2c5". > > Signed-off-by: Eddie Huang <[email protected]> > --- > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 119 > +++++++++++++++++++++++++++++++ > 1 file changed, 119 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > index b52ec43..72d9ab1 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi > @@ -158,6 +158,53 @@ > interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 146 > IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 147 > IRQ_TYPE_LEVEL_HIGH>; > + i2c0_pins_a: i2c0@0 { > + pins1 { > + pinmux = > <MT8173_PIN_45_SDA0__FUNC_SDA0>, > + > <MT8173_PIN_46_SCL0__FUNC_SCL0>; > + bias-disable; > + }; > + }; > + > + i2c1_pins_a: i2c1@0 { > + pins1 { > + pinmux = > <MT8173_PIN_125_SDA1__FUNC_SDA1>, > + > <MT8173_PIN_126_SCL1__FUNC_SCL1>; > + bias-disable; > + }; > + }; > + > + i2c2_pins_a: i2c2@0 { > + pins1 { > + pinmux = > <MT8173_PIN_43_SDA2__FUNC_SDA2>, > + > <MT8173_PIN_44_SCL2__FUNC_SCL2>; > + bias-disable; > + }; > + }; > + > + i2c3_pins_a: i2c3@0 { > + pins1 { > + pinmux = > <MT8173_PIN_106_SDA3__FUNC_SDA3>, > + > <MT8173_PIN_107_SCL3__FUNC_SCL3>; > + bias-disable; > + }; > + }; > + > + i2c4_pins_a: i2c4@0 { > + pins1 { > + pinmux = > <MT8173_PIN_133_SDA4__FUNC_SDA4>, > + > <MT8173_PIN_134_SCL4__FUNC_SCL4>; > + bias-disable; > + }; > + }; > + > + i2c6_pins_a: i2c6@0 { > + pins1 { > + pinmux = > <MT8173_PIN_100_MSDC2_DAT0__FUNC_SDA5>, > + > <MT8173_PIN_101_MSDC2_DAT1__FUNC_SCL5>; > + bias-disable; > + }; > + }; > }; > > watchdog: watchdog@10007000 { > @@ -194,6 +241,78 @@ > (GIC_CPU_MASK_SIMPLE(4) | > IRQ_TYPE_LEVEL_HIGH)>; > }; > > + i2c0: i2c@11007000 { > + compatible = "mediatek,mt8173-i2c"; > + reg = <0 0x11007000 0 0x70>, > + <0 0x11000100 0 0x80>; > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_LOW>; > + clock-div = <16>; > + clocks = <&pericfg CLK_PERI_I2C0>, > + <&pericfg CLK_PERI_AP_DMA>; > + clock-names = "main", "dma"; > + status = "disabled";
Please order nodes by their register address. Thanks, Matthias -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
