From: Dinh Nguyen <[email protected]> Just in case the firmware did not enable data and instruction prefetch in the L2 cache controller, we enable it in the kernel.
Signed-off-by: Dinh Nguyen <[email protected]> --- arch/arm/boot/dts/socfpga.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 80f924d..1e3c833 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -639,6 +639,8 @@ cache-level = <2>; arm,tag-latency = <1 1 1>; arm,data-latency = <2 1 1>; + prefetch-data = <1>; + prefetch-instr = <1>; }; mmc: dwmmc0@ff704000 { -- 2.4.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
