This change documents a new property for the Atmel serial device, allowing an implementer to specify either four bytes or one byte access to the controller data register.
This supports a change that unbreaks this driver on ATNGW100 board. Signed-off-by: Andy Shevchenko <[email protected]> --- Documentation/devicetree/bindings/serial/atmel-usart.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt index e6e6142..a8c290a7 100644 --- a/Documentation/devicetree/bindings/serial/atmel-usart.txt +++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt @@ -6,6 +6,8 @@ Required properties: additional mode or an USART new feature. For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart" - reg: Should contain registers location and length +- reg-io-width: The I/O register width (in bytes) implemented by + this device. Supported values are 1 or 4 (the default). - interrupts: Should contain interrupt - clock-names: tuple listing input clock names. Required elements: "usart" -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
