On Thu, Sep 03, 2015 at 04:34:22AM +0100, Alexander Couzens wrote:
> The ar7240 misc irq chip use ack handler
> instead of ack_mask handler. All new ath79 chips use
> the ar7240 misc irq chip
>
> Signed-off-by: Alexander Couzens <[email protected]>
> ---
> .../interrupt-controller/qca,ath79-misc-intc.txt | 18
> +++++++++++++++++-
> arch/mips/ath79/irq.c | 10 ++++++++++
> 2 files changed, 27 insertions(+), 1 deletion(-)
>
> diff --git
> a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
>
> b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
> index 391717a..56ccaf3 100644
> ---
> a/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
> +++
> b/Documentation/devicetree/bindings/interrupt-controller/qca,ath79-misc-intc.txt
> @@ -4,7 +4,7 @@ The MISC interrupt controller is a secondary controller for
> lower priority
> interrupt.
>
> Required Properties:
> -- compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc"
> +- compatible: has to be "qca,<soctype>-cpu-intc",
> "qca,ar{7100,7240}-misc-intc"
Please list those strings separately, in full, such that they can be
searched for. Otherwise the addition looks fine to me.
Mark.
> as fallback
> - reg: Base address and size of the controllers memory area
> - interrupt-parent: phandle of the parent interrupt controller.
> @@ -13,6 +13,9 @@ Required Properties:
> - #interrupt-cells : Specifies the number of cells needed to encode interrupt
> source, should be 1
>
> +Compatible fallback depends on the SoC. Use ar7100 for ar71xx and ar913x,
> +use ar7240 for all other SoCs.
> +
> Please refer to interrupts.txt in this directory for details of the common
> Interrupt Controllers bindings used by client devices.
>
> @@ -28,3 +31,16 @@ Example:
> interrupt-controller;
> #interrupt-cells = <1>;
> };
> +
> +Another example:
> +
> + interrupt-controller@18060010 {
> + compatible = "qca,ar9331-misc-intc", qca,ar7240-misc-intc";
> + reg = <0x18060010 0x4>;
> +
> + interrupt-parent = <&cpuintc>;
> + interrupts = <6>;
> +
> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
> index 1917f55..7b38958 100644
> --- a/arch/mips/ath79/irq.c
> +++ b/arch/mips/ath79/irq.c
> @@ -320,6 +320,16 @@ static int __init ar7100_misc_intc_of_init(
> IRQCHIP_DECLARE(ar7100_misc_intc, "qca,ar7100-misc-intc",
> ar7100_misc_intc_of_init);
>
> +static int __init ar7240_misc_intc_of_init(
> + struct device_node *node, struct device_node *parent)
> +{
> + ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
> + return ath79_misc_intc_of_init(node, parent);
> +}
> +
> +IRQCHIP_DECLARE(ar7240_misc_intc, "qca,ar7240-misc-intc",
> + ar7240_misc_intc_of_init);
> +
> static int __init ar79_cpu_intc_of_init(
> struct device_node *node, struct device_node *parent)
> {
> --
> 2.4.0
>
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