Recent kernels requires cache hierrachy to be defined via DT hence this patch updates NS2 DT accordingly.
Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Sandeep Tripathy <[email protected]> Reviewed-by: Ray Jui <[email protected]> Reviewed-by: Scott Branden <[email protected]> --- arch/arm64/boot/dts/broadcom/ns2.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 3c92d92..f759175 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -50,6 +50,7 @@ reg = <0 0>; enable-method = "spin-table"; cpu-release-addr = <0 0x84b00000>; + next-level-cache = <&CLUSTER0_L2>; }; cpu@1 { @@ -58,6 +59,7 @@ reg = <0 1>; enable-method = "spin-table"; cpu-release-addr = <0 0x84b00000>; + next-level-cache = <&CLUSTER0_L2>; }; cpu@2 { @@ -66,6 +68,7 @@ reg = <0 2>; enable-method = "spin-table"; cpu-release-addr = <0 0x84b00000>; + next-level-cache = <&CLUSTER0_L2>; }; cpu@3 { @@ -74,6 +77,11 @@ reg = <0 3>; enable-method = "spin-table"; cpu-release-addr = <0 0x84b00000>; + next-level-cache = <&CLUSTER0_L2>; + }; + + CLUSTER0_L2: l2-cache@000 { + compatible = "cache"; }; }; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
