From: Andrei Pistirica <[email protected]> Document the devicetree bindings for the USART peripheral found on Microchip PIC32 class devices.
Signed-off-by: Andrei Pistirica <[email protected]> Signed-off-by: Joshua Henderson <[email protected]> --- .../bindings/serial/microchip,pic32-usart.txt | 29 ++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt diff --git a/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt b/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt new file mode 100644 index 0000000..c87321c --- /dev/null +++ b/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt @@ -0,0 +1,29 @@ +* Microchip Universal Synchronous Asynchronous Receiver/Transmitter (USART) + +Required properties: +- compatible: Should be "microchip,pic32-usart" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt +- pinctrl: Should contain pinctrl for TX/RX/RTS/CTS + +Optional properties: +- microchip,uart-has-rtscts : Indicate the uart has hardware flow control +- rts-gpios: RTS pin for USP-based UART if microchip,uart-has-rtscts +- cts-gpios: CTS pin for USP-based UART if microchip,uart-has-rtscts + +Example: + usart0: serial@1f822000 { + compatible = "microchip,pic32-usart"; + reg = <0x1f822000 0x50>; + interrupts = <UART1_FAULT DEFAULT_INT_PRI IRQ_TYPE_NONE>, + <UART1_RECEIVE_DONE DEFAULT_INT_PRI IRQ_TYPE_NONE>, + <UART1_TRANSFER_DONE DEFAULT_INT_PRI IRQ_TYPE_NONE>; + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_uart1 + &pinctrl_uart1_cts + &pinctrl_uart1_rts>; + microchip,uart-has-rtscts; + cts-gpios = <&pioB 15 0>; + rts-gpios = <&pioD 1 0>; + }; -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
