> > This patch adds the DMC (Dynamic Memory Controller) bus node for Exynos3250 > SoC. > The DMC is an AMBA AXI-compliant slave to interface external JEDEC standard > SDRAM devices. The bus includes the OPP tables and the source clock for DMC > block. > > Following list specifies the detailed relation between the clock and DMC > block: > - The source clock of DMC block : div_dmc > > Signed-off-by: Chanwoo Choi <[email protected]> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
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