Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

This increases the range and accuracy of supported baud rates.

Signed-off-by: Geert Uytterhoeven <[email protected]>
---
Based on schematics, tested with remote access.

v2:
  - New.
---
 arch/arm/boot/dts/r8a7778-bockw.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts 
b/arch/arm/boot/dts/r8a7778-bockw.dts
index b1aa025992293a58..482228b8a984656e 100644
--- a/arch/arm/boot/dts/r8a7778-bockw.dts
+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
@@ -126,11 +126,19 @@
 };
 
 &pfc {
+       pinctrl-0 = <&scif_clk_pins>;
+       pinctrl-names = "default";
+
        scif0_pins: serial0 {
                renesas,groups = "scif0_data_a", "scif0_ctrl";
                renesas,function = "scif0";
        };
 
+       scif_clk_pins: scif_clk {
+               renesas,groups = "scif_clk";
+               renesas,function = "scif_clk";
+       };
+
        mmc_pins: mmc {
                renesas,groups = "mmc_data8", "mmc_ctrl";
                renesas,function = "mmc";
@@ -177,6 +185,11 @@
        #sound-dai-cells = <0>;
 };
 
+&scif_clk {
+       clock-frequency = <14745600>;
+       status = "okay";
+};
+
 &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>, <&sdhi0_pup_pins>;
        pinctrl-names = "default";
-- 
1.9.1

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