This tool could also come as a *plugin* to KiCad, although I think it would 
make it more popular to include it as one of the calculator's tools. I know 
that Pierre Le Gargasson is starting to work on such a plugin (s far as I 
know, his idea is to provide a computed carbon intensity impact of the 
designed PCB). I will discuss this with him in 2 weeks, when he will be 
presenting some related work during the sustainable electronics symposium 
in Grenoble. Some additional ideas / inputs will probably follow.

All the best,
Vincent.

Le dimanche 30 novembre 2025 à 03:51:15 UTC+1, [email protected] a écrit :

> I saw the previous emails on the topic but haven't had the time to reply 
> yet.
>
> I've been looking at the PCB calculator, because it has some issues that 
> break my workflow, and am happy to help with panel design. Currently, I'd 
> say the topic is blocked on a decision here: 
> https://gitlab.com/kicad/code/kicad/-/issues/22385#note_2912749088
>
> One thing I'd say is that the idea of endlessly nesting wxBoxSizer with 
> alternating horizontal and vertical layouts leads to bad designs, which are 
> visually unappealing and cause issues with resizing. It's better to use 
> wxGridBagSizer and do a table layout.
>
> Best regards
> Jan
>
> On Thu, Nov 27, 2025 at 3:26 PM Vincent Grennerat <[email protected]> 
> wrote:
>
>> Hello all,
>>
>> Here are some answers to your feedbacks:
>>
>> *@Seth*: I think we are not at the step of a panel mock-up. First step 
>> is probably to check whether some developers of the community want to put 
>> some energy on this or not. Hence the workgroup idea I suggested: if we 
>> think we have some non-questionnable impact indicators, and it is relevant 
>> to have it in KiCad, then we can move forward to the design of the tool.
>>
>> *@Munzo*: it is difficult to sum-up in a few lines the probable best 
>> strategies to reduce the ecological footprint of PCBs. It is highly 
>> interdependent with reliability, lifetime expectancy, modularity etc... As 
>> far as the schematic and layout designer is concerned, it can involve the 
>> following choices:
>> - *substrate*: do I choose a Rogers RO3000 because it has lower HF 
>> losses than FR4, or do I accept a bit higher power consumption of my RF Tx 
>> chip because I choose FR4 for its lower manufacturing and end-of-life 
>> impacts? Probably same question in the near future with bio-substrates 
>> which will have lower impact than FR4 but some technological drawbacks.
>> - *Manufacturing process* (multilayers, stack-up, micro-vias etc...): 
>> designers limit their PCB complexity mainly because of manufacturing cost, 
>> but with potential recycling technologies to come (let's remind everyone 
>> that currently everything is just burnt, when not ditched!), the ecological 
>> impacts will not be proportional to manufacturing cost. Here we have an 
>> indicator related to the manufacturing impacts but also to recycling 
>> technology. It will probably evolve a lot during the next years, and is 
>> probably the most difficult to estimate.
>> - *Copper*: the current practice with subtractive tech is "You pay for 
>> the copper, leave it on the board!". But removing the maximum of the copper 
>> at the manufacturing step (everything that does not have an electrical or 
>> thermal function), in compliance with the panelization balancing 
>> strategies, could enable a much much shorter circularity loop for copper, 
>> which is becoming a more and more critical resource: all the etched copper 
>> is highly pure, with low recycling cost (but OK, it slightly increases the 
>> manufacturing cost), compared to a potential collect at end-of-life, with 
>> costly and very poor recycling yield. Let's also keep in mind that the 
>> recycling of the copper at end-of-life is topic.
>>
>> *@Angelo*: In the end, the pistachios are not so far from what is 
>> currently going on around the more sustainable electronics topic :-) Take a 
>> look at the below links. There even was some tries in the past with coconut 
>> shells or banana fibres!
>> JIVA Soluboard: https://www.jivamaterials.com/technology/
>> DESIRE4EU consortium research: 
>> https://desire4eu-eic.eu/state-of-the-art-challenges-and-ambitions/
>>
>>
>>
>> Le mardi 25 novembre 2025 à 17:54:55 UTC+1, [email protected] a écrit :
>>
>> Hello Vincent-
>>
>> I'd be happy to hear more about what you have in mind for design rules 
>> that can improve this.  If you have design mock-ups for calculator panels 
>> and/or DRC-type rules that can be codified, we should be able to work with 
>> you to help implement them.
>>
>> The best way to share these ideas would be in a GitLab issue report.  Use 
>> KiCad's Help->Report Bug menu option to get the link and formatting.  Then, 
>> add your description and images.  In this case, images will be very 
>> important.
>>
>> Seth
>>
>> [image: KiCad Services Corporation Logo]
>> Seth Hillbrand *Lead Developer* +1-530-302-5483‬ Long Beach, CA 
>> www.kipro-pcb.com    [email protected]
>>
>>
>> On Tue, Nov 25, 2025 at 3:15 AM Vincent Grennerat <[email protected]> 
>> wrote:
>>
>> I have been continuously using KiCad since 2005 (I am a former colleague 
>> of JP Charras), and I am now focusing my research on increasing the 
>> sustainability of electronics, especially at the PCB level. In this context 
>> I am member of the DESIRE4EU research project (https://desire4eu-eic.eu) 
>> which has the aim to bring to industry new innovative low-impact substrates 
>> for PCB, compatible with current subtractive manufacturing technologies. 
>> With Arduino onboard, we are currently designing (on KiCad of course!) the 
>> next IoT Arduino board, through an eco-design approach.
>>
>> Part of my work consists of exploring new PCB design rules that would 
>> significantly contribute to reduce the ecological footprint of PCBs 
>> (typically 5 to 25% of an assembled electronic board), at the manufacturing 
>> step and at end-of-life. I now think that CAD softwares could include sone 
>> kind of eco-design tool to help the designers in evaluating and reducing 
>> the ecological footprint of their design. The tool could be part of the 
>> KiCad toolbox, inside the PCB Calculator application. Among other things, 
>> it would probably rely on life cycle assessment macro-results (a small 
>> database), upstream produced by some LCA software.
>>
>> I cannot be a software contributor to KiCad, but if some developers show 
>> interest in this potential new tool, I could contribute to provide the 
>> inputs and the design of the tool. I suppose that this "eco-design rules" 
>> concept can seem rather vague for a lot of people, and I'd be delighted to 
>> develop our research results on copper circularity, and how we can rethink 
>> our way of laying out copper on the PCB layers.
>>
>> -- 
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>
> -- 
> Jan Dorniak
> e-mail:[email protected]
>
>

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